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| author | Alejandro Soto <alejandro@34project.org> | 2022-12-11 14:48:08 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-12-16 16:27:20 -0600 |
| commit | ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31 (patch) | |
| tree | 41190239b9220db09d8849afb6d6f6dbbc03f59b /rtl/core/cp15/far.sv | |
| parent | 6fee344b754464b1fd17f7c0429e6597e51dc74d (diff) | |
Implement data aborts
Diffstat (limited to 'rtl/core/cp15/far.sv')
| -rw-r--r-- | rtl/core/cp15/far.sv | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/rtl/core/cp15/far.sv b/rtl/core/cp15/far.sv index b90dc0f..3d86151 100644 --- a/rtl/core/cp15/far.sv +++ b/rtl/core/cp15/far.sv @@ -11,6 +11,9 @@ module core_cp15_far input cp_opcode op2, input word write, + input logic fault_register, + input ptr fault_addr, + output word read ); @@ -21,6 +24,8 @@ module core_cp15_far always @(posedge clk or negedge rst_n) if(!rst_n) far <= 0; + else if(fault_register) + far <= {fault_addr, 2'b00}; else if(transfer && !load) far <= write; |