Implement rest of cp15 registers

1 files changed, 27 insertions, 0 deletions

diff --git a/rtl/core/cp15/far.sv b/rtl/core/cp15/far.sv
new file mode 100644
index 0000000..b90dc0f
--- /dev/null
+++ b/rtl/core/cp15/far.sv
@@ -0,0 +1,27 @@
+`include "core/uarch.sv"
+`include "core/cp15/map.sv"
+
+module core_cp15_far
+(
+	input  logic     clk,
+	                 rst_n,
+
+	input  logic     load,
+	                 transfer,
+	input  cp_opcode op2,
+	input  word      write,
+
+	output word      read
+);
+
+	word far;
+
+	assign read = far;
+
+	always @(posedge clk or negedge rst_n)
+		if(!rst_n)
+			far <= 0;
+		else if(transfer && !load)
+			far <= write;
+
+endmodule