diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-11-15 21:48:08 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-11-15 21:48:08 -0600 |
| commit | 8ab171864291c74d0a22cac911bc8a8aee8a7d5b (patch) | |
| tree | ecf0eeb1149f35965cb345aaab1548a800813e63 /rtl/core/control | |
| parent | 84e9a917a31f39eaf333d1fc69b30d13e7640c7a (diff) | |
Fix false undefined exception
Diffstat (limited to 'rtl/core/control')
| -rw-r--r-- | rtl/core/control/issue.sv | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/rtl/core/control/issue.sv b/rtl/core/control/issue.sv index c1c932e..d124a0d 100644 --- a/rtl/core/control/issue.sv +++ b/rtl/core/control/issue.sv @@ -32,11 +32,13 @@ module core_control_issue undefined <= 0; pc_visible <= 2; end else if(next_cycle.issue) begin - undefined <= dec.ctrl.undefined; + if(issue) begin + undefined <= dec.ctrl.undefined; `ifdef VERILATOR - if(dec.ctrl.undefined) - $display("[core] undefined insn: [0x%08x] %08x", insn_pc << 2, insn); + if(dec.ctrl.undefined) + $display("[core] undefined insn: [0x%08x] %08x", insn_pc << 2, insn); + end `endif pc <= insn_pc; |