Implement breakpoints

3 files changed, 4 insertions, 1 deletions

diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv
index 9f398dc..92e27d6 100644
--- a/rtl/core/control/control.sv
+++ b/rtl/core/control/control.sv
@@ -32,6 +32,7 @@ module core_control
 	                       stall,
 	                       branch,
 	                       writeback,
+	                       breakpoint,
 	                       update_flags,
 	                       c_in,
 	output reg_num         rd,
diff --git a/rtl/core/control/issue.sv b/rtl/core/control/issue.sv
index ffdf250..b8cf3ff 100644
--- a/rtl/core/control/issue.sv
+++ b/rtl/core/control/issue.sv
@@ -18,6 +18,7 @@ module core_control_issue
 
 	output logic       issue,
 	                   undefined,
+	                   breakpoint,
 	output ptr         pc,
 	                   pc_visible,
 	                   next_pc_visible
@@ -27,6 +28,7 @@ module core_control_issue
 
 	assign valid = !next_bubble && !halt;
 	assign issue = next_cycle.issue && dec.ctrl.execute && valid;
+	assign breakpoint = issue && dec.ctrl.bkpt;
 	assign next_pc_visible = insn_pc + 2;
 
 	always_ff @(posedge clk or negedge rst_n)
diff --git a/rtl/core/control/stall.sv b/rtl/core/control/stall.sv
index 085f11e..f42dcf0 100644
--- a/rtl/core/control/stall.sv
+++ b/rtl/core/control/stall.sv
@@ -24,7 +24,7 @@ module core_control_stall
 	logic pc_rd_hazard, pc_wr_hazard, rn_pc_hazard, snd_pc_hazard, psr_hazard, flags_hazard;
 
 	assign stall = !next_cycle.issue || next_bubble || halt;
-	assign halted = halt && !next_bubble;
+	assign halted = halt && !next_bubble && next_cycle.issue;
 	assign next_bubble = pc_rd_hazard || pc_wr_hazard || flags_hazard || psr_hazard;
 
 	//FIXME: pc_rd_hazard no debería definirse sin final_writeback?