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authorAlejandro Soto <alejandro@34project.org>2022-12-11 14:48:08 -0600
committerAlejandro Soto <alejandro@34project.org>2022-12-16 16:27:20 -0600
commitff71bcd0c5425c168f111b8f4a92d0a90a6c9c31 (patch)
tree41190239b9220db09d8849afb6d6f6dbbc03f59b /rtl/core/control/psr.sv
parent6fee344b754464b1fd17f7c0429e6597e51dc74d (diff)
Implement data aborts
Diffstat (limited to 'rtl/core/control/psr.sv')
-rw-r--r--rtl/core/control/psr.sv5
1 files changed, 3 insertions, 2 deletions
diff --git a/rtl/core/control/psr.sv b/rtl/core/control/psr.sv
index 5767124..07bf4e5 100644
--- a/rtl/core/control/psr.sv
+++ b/rtl/core/control/psr.sv
@@ -10,6 +10,7 @@ module core_control_psr
spsr_rd,
alu_b,
input psr_mode mode,
+ exception_mode,
input ctrl_cycle cycle,
next_cycle,
@@ -44,8 +45,8 @@ module core_control_psr
psr_write = 1;
if(cycle.escalate)
- //TODO: otros modos, y además F (FIQ) no cambia siempre
- psr_wr = {24'b0, 3'b110, `MODE_UND};
+ //TODO: F (FIQ) no cambia siempre
+ psr_wr = {24'b0, 3'b110, exception_mode};
else if(cycle.exception)
psr_wr = exception_spsr;
else