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authorAlejandro Soto <alejandro@34project.org>2022-12-07 19:18:04 -0600
committerAlejandro Soto <alejandro@34project.org>2022-12-07 19:51:41 -0600
commitc39552375661e495b344e8386649ade92a4d45b2 (patch)
tree45623ce35964e43ae7d8804c1ef1c6dedb3ba7a1 /rtl/core/control/issue.sv
parentb1761b8eac5777c09723bbc8cd31cc05d8ec35ae (diff)
Implement single-stepping
Diffstat (limited to 'rtl/core/control/issue.sv')
-rw-r--r--rtl/core/control/issue.sv2
1 files changed, 0 insertions, 2 deletions
diff --git a/rtl/core/control/issue.sv b/rtl/core/control/issue.sv
index b8cf3ff..ffdf250 100644
--- a/rtl/core/control/issue.sv
+++ b/rtl/core/control/issue.sv
@@ -18,7 +18,6 @@ module core_control_issue
output logic issue,
undefined,
- breakpoint,
output ptr pc,
pc_visible,
next_pc_visible
@@ -28,7 +27,6 @@ module core_control_issue
assign valid = !next_bubble && !halt;
assign issue = next_cycle.issue && dec.ctrl.execute && valid;
- assign breakpoint = issue && dec.ctrl.bkpt;
assign next_pc_visible = insn_pc + 2;
always_ff @(posedge clk or negedge rst_n)