summaryrefslogtreecommitdiff
path: root/rtl/core/control/exception.sv
diff options
context:
space:
mode:
authorAlejandro Soto <alejandro@34project.org>2022-12-13 23:21:32 -0600
committerAlejandro Soto <alejandro@34project.org>2022-12-16 16:29:10 -0600
commit8c06c97c81339f68e06ff465aac2d8b1f2da4e27 (patch)
tree05e71f5508f4f00cb0abd6b0ec0d35d441313de8 /rtl/core/control/exception.sv
parentf3c153f342ed969b1abfbe79d1017b651f21a649 (diff)
Implement interrupt emulation
Diffstat (limited to 'rtl/core/control/exception.sv')
-rw-r--r--rtl/core/control/exception.sv4
1 files changed, 2 insertions, 2 deletions
diff --git a/rtl/core/control/exception.sv b/rtl/core/control/exception.sv
index 76abc5c..02560a6 100644
--- a/rtl/core/control/exception.sv
+++ b/rtl/core/control/exception.sv
@@ -35,8 +35,8 @@ module core_control_exception
exception_mode <= 0;
exception_offset_pc <= 0;
end begin
- if(issue)
- pending_irq <= irq && !intmask.i;
+ if(next_cycle.issue)
+ pending_irq <= issue && irq && !intmask.i;
// A2.6.10 Exception priorities
if(mem_fault) begin