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| author | Alejandro Soto <alejandro@34project.org> | 2022-12-09 00:32:34 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-12-09 00:36:44 -0600 |
| commit | b2b2d5124db13714ed82181c9558568d908dfa2a (patch) | |
| tree | 1779e0751eb49b1a62beff291792455a7e4ff740 /rtl/core/control/control.sv | |
| parent | 2cbccf921bf84665c55cea67b81f31c66dde4249 (diff) | |
Implement cp15 control
Diffstat (limited to 'rtl/core/control/control.sv')
| -rw-r--r-- | rtl/core/control/control.sv | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv index 7658ee9..79d6d36 100644 --- a/rtl/core/control/control.sv +++ b/rtl/core/control/control.sv @@ -24,6 +24,7 @@ module core_control input logic mul_ready, input word mul_q_hi, mul_q_lo, + coproc_read, `ifdef VERILATOR input word insn, @@ -67,7 +68,8 @@ module core_control psr_write, psr_wr_flags, psr_wr_control, - output word psr_wr + output word psr_wr, + output coproc_decode coproc_ctrl ); ctrl_cycle cycle, next_cycle; @@ -152,6 +154,8 @@ module core_control .* ); + word coproc_wb; + core_control_coproc ctrl_cp ( .* |