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authorAlejandro Soto <alejandro@34project.org>2022-12-07 19:18:04 -0600
committerAlejandro Soto <alejandro@34project.org>2022-12-07 19:51:41 -0600
commitc39552375661e495b344e8386649ade92a4d45b2 (patch)
tree45623ce35964e43ae7d8804c1ef1c6dedb3ba7a1 /rtl/core/arm810.sv
parentb1761b8eac5777c09723bbc8cd31cc05d8ec35ae (diff)
Implement single-stepping
Diffstat (limited to '')
-rw-r--r--rtl/core/arm810.sv7
1 files changed, 5 insertions, 2 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv
index 05bce76..1771464 100644
--- a/rtl/core/arm810.sv
+++ b/rtl/core/arm810.sv
@@ -6,6 +6,7 @@ module arm810
rst_n,
irq,
halt,
+ step,
output ptr bus_addr,
output logic bus_start,
@@ -21,19 +22,21 @@ module arm810
ptr fetch_insn_pc, fetch_head, insn_addr;
word fetch_insn;
- logic stall, flush, prefetch_flush, insn_start;
+ logic fetch_nop, stall, flush, prefetch_flush, insn_start;
//TODO
- assign prefetch_flush = 0;
+ assign prefetch_flush = halt;
core_fetch #(.PREFETCH_ORDER(2)) fetch
(
+ .nop(fetch_nop),
.addr(insn_addr),
.insn(fetch_insn),
.fetch(insn_start),
.fetched(insn_ready),
.insn_pc(fetch_insn_pc),
.fetch_data(insn_data_rd),
+ .porch_insn_pc(insn_pc),
.*
);