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| author | Fabian Montero <fabian@posixlycorrect.com> | 2023-10-04 18:21:17 -0600 |
|---|---|---|
| committer | Fabian Montero <fabian@posixlycorrect.com> | 2023-10-04 18:21:17 -0600 |
| commit | dc14faa1cf9021432601ab5f1f20b658dea1bbdf (patch) | |
| tree | 84df164e4557f09dd56595a755c3cae9dcbd5baf /rtl/cache/sram.sv | |
| parent | 4448c8f77c87ad1ac34f42df2ef6ef91c36b54a6 (diff) | |
improve comments
Diffstat (limited to '')
| -rw-r--r-- | rtl/cache/sram.sv | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/rtl/cache/sram.sv b/rtl/cache/sram.sv index bd9140d..fc68185 100644 --- a/rtl/cache/sram.sv +++ b/rtl/cache/sram.sv @@ -22,7 +22,8 @@ module cache_sram // https://www.intel.com/content/www/us/en/docs/programmable/683082/21-3/ram-with-byte-enable-signals.html // Define la cantidad de líneas de cache - // $bits(addr_index) = 9 --> 1 << 9 = 512 + // Cantidad de bits en addr_index = 9, entonces se le hace left shift 9 + // espacios 1. Osea, 512. localparam DEPTH = 1 << $bits(addr_index); line data_file[DEPTH] /*verilator public*/; |