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authorAlejandro Soto <alejandro@34project.org>2023-10-06 08:56:38 -0600
committerAlejandro Soto <alejandro@34project.org>2023-10-06 08:56:38 -0600
commit71df72cbe6fdfd65e5f7e3eb82bbeb76815b1ee7 (patch)
treeda1d4cf1b3902d563b26e5c83f96f5f9c4ffe15b /rtl/cache/cache.sv
parent8d22db83560d782c2f9e43e7359d7f616a3f4bb0 (diff)
rtl/cache: split ring.sv out of cache_control.sv
Diffstat (limited to '')
-rw-r--r--rtl/cache/cache.sv10
1 files changed, 9 insertions, 1 deletions
diff --git a/rtl/cache/cache.sv b/rtl/cache/cache.sv
index 829546f..1fdecde 100644
--- a/rtl/cache/cache.sv
+++ b/rtl/cache/cache.sv
@@ -60,7 +60,7 @@ module cache
word cache_mem_address;
line cache_mem_writedata;
logic cache_core_waitrequest, cache_mem_waitrequest, cache_mem_read, cache_mem_write,
- debug_ready, send, lock_line, unlock_line;
+ debug_ready, send, send_read, send_inval, set_reply, lock_line, unlock_line;
cache_control control
(
@@ -83,6 +83,14 @@ module cache
.*
);
+ logic in_hold_valid, last_hop, out_stall;
+ ring_req in_hold;
+
+ cache_ring ring
+ (
+ .*
+ );
+
line core_readdata_line;
logic cache_core_read, cache_core_write;
addr_tag core_tag;