diff options
| author | Alejandro Soto <alejandro@34project.org> | 2023-10-21 03:40:30 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-10-21 03:40:30 -0600 |
| commit | 0d3a62a498f60c4fa1941026495991da78de712d (patch) | |
| tree | c97ca0c16f073c9a0156608b0be81777d9dd01ea /platform.qsys | |
| parent | d84718bf7955a6bba03aa44938f0f140c1a6390d (diff) | |
platform: add gfx
Diffstat (limited to '')
| -rw-r--r-- | platform.qsys | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/platform.qsys b/platform.qsys index 0e829c7..ebcff33 100644 --- a/platform.qsys +++ b/platform.qsys @@ -97,6 +97,14 @@ type = "int"; } } + element gfx_0 + { + datum _sortIndex + { + value = "29"; + type = "int"; + } + } element hps_0 { datum _sortIndex @@ -426,6 +434,7 @@ <module name="cpu_3" kind="core" version="1.0" enabled="1"> <parameter name="AUTO_INTERRUPT_RECEIVER_INTERRUPTS_USED" value="0" /> </module> + <module name="gfx_0" kind="gfx" version="1.0" enabled="1" /> <module name="hps_0" kind="altera_hps" version="20.1" enabled="1"> <parameter name="ABSTRACT_REAL_COMPARE_TEST" value="false" /> <parameter name="ABS_RAM_MEM_INIT_FILENAME" value="meminit" /> @@ -1424,6 +1433,11 @@ <parameter name="baseAddress" value="0x30140000" /> <parameter name="defaultConnection" value="false" /> </connection> + <connection kind="avalon" version="20.1" start="mm_bridge.m0" end="gfx_0.cmd"> + <parameter name="arbitrationPriority" value="1" /> + <parameter name="baseAddress" value="0x3c000000" /> + <parameter name="defaultConnection" value="false" /> + </connection> <connection kind="avalon" version="20.1" start="mm_bridge.m0" end="cache_0.dbg"> <parameter name="arbitrationPriority" value="1" /> <parameter name="baseAddress" value="0x30100000" /> @@ -1665,6 +1679,7 @@ end="hps_0.f2h_sdram0_clock" /> <connection kind="clock" version="20.1" start="pll_0.outclk1" end="mm_bridge.clk" /> <connection kind="clock" version="20.1" start="pll_0.outclk1" end="smp_0.clock" /> + <connection kind="clock" version="20.1" start="pll_0.outclk1" end="gfx_0.clock" /> <connection kind="clock" version="20.1" @@ -1889,6 +1904,11 @@ <connection kind="reset" version="20.1" + start="clk_0.clk_reset" + end="gfx_0.reset_sink" /> + <connection + kind="reset" + version="20.1" start="sys_sdram_pll_0.reset_source" end="vram.reset" /> <connection |