diff options
| author | Alejandro Soto <alejandro@34project.org> | 2024-02-13 12:15:24 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2024-02-20 11:12:22 -0600 |
| commit | 641f52789a392f6370195003a04d6e674878628d (patch) | |
| tree | f3961dcb6cbdf116d330b97fa8a89575b15549c0 /core_hw.tcl | |
| parent | 827c40829903d5b870f47ab2f389792ed10211bd (diff) | |
rtl/core/cp15: implement thread-local CP15 registers (from v7 spec), required for Linux SMP
Diffstat (limited to '')
| -rw-r--r-- | core_hw.tcl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/core_hw.tcl b/core_hw.tcl index ed82b8f..1e9631d 100644 --- a/core_hw.tcl +++ b/core_hw.tcl @@ -71,6 +71,7 @@ add_fileset_file core_cp15_cyclecnt.sv SYSTEM_VERILOG PATH rtl/core/core_cp15_cy add_fileset_file core_cp15_domain.sv SYSTEM_VERILOG PATH rtl/core/core_cp15_domain.sv add_fileset_file core_cp15_far.sv SYSTEM_VERILOG PATH rtl/core/core_cp15_far.sv add_fileset_file core_cp15_fsr.sv SYSTEM_VERILOG PATH rtl/core/core_cp15_fsr.sv +add_fileset_file core_cp15_pid.sv SYSTEM_VERILOG PATH rtl/core/core_cp15_pid.sv add_fileset_file core_cp15_syscfg.sv SYSTEM_VERILOG PATH rtl/core/core_cp15_syscfg.sv add_fileset_file core_cp15_tlb.sv SYSTEM_VERILOG PATH rtl/core/core_cp15_tlb.sv add_fileset_file core_cp15_tlb_lockdown.sv SYSTEM_VERILOG PATH rtl/core/core_cp15_tlb_lockdown.sv |