diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-11-02 23:48:21 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-11-02 23:48:21 -0600 |
| commit | abe3a7da04a3703bd504b5ed2e13ecc79dff4bd0 (patch) | |
| tree | 09d30c745a9e8c49e7ee4627176a6fdc8264745f /conspiracion_bus_master_hw.tcl | |
| parent | 4ef4190e67534168e1e64b810a09c0cd1338e2a9 (diff) | |
Add bus master forward signals: irq, cpu_clk
Diffstat (limited to 'conspiracion_bus_master_hw.tcl')
| -rw-r--r-- | conspiracion_bus_master_hw.tcl | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/conspiracion_bus_master_hw.tcl b/conspiracion_bus_master_hw.tcl index dadceca..93da31b 100644 --- a/conspiracion_bus_master_hw.tcl +++ b/conspiracion_bus_master_hw.tcl @@ -1,11 +1,11 @@ # TCL File Generated by Component Editor 20.1 -# Thu Nov 03 05:18:16 GMT 2022 +# Thu Nov 03 05:39:37 GMT 2022 # DO NOT MODIFY # # conspiracion_bus_master "Toplevel bus master" v1.0 -# 2022.11.03.05:18:16 +# 2022.11.03.05:39:37 # # @@ -135,4 +135,23 @@ add_interface_port core data_wr data_wr Input 32 add_interface_port core ready ready Output 1 add_interface_port core write write Input 1 add_interface_port core start start Input 1 +add_interface_port core irq irq Output 1 +add_interface_port core cpu_clk cpu_clk Output 1 + + +# +# connection point irq +# +add_interface irq interrupt start +set_interface_property irq associatedAddressablePoint avalon_master +set_interface_property irq associatedClock clock +set_interface_property irq associatedReset reset_sink +set_interface_property irq irqScheme INDIVIDUAL_REQUESTS +set_interface_property irq ENABLED true +set_interface_property irq EXPORT_OF "" +set_interface_property irq PORT_NAME_MAP "" +set_interface_property irq CMSIS_SVD_VARIABLES "" +set_interface_property irq SVD_ADDRESS_GROUP "" + +add_interface_port irq avl_irq irq Input 1 |