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authorAlejandro Soto <alejandro@34project.org>2022-11-06 19:55:54 -0600
committerAlejandro Soto <alejandro@34project.org>2022-11-06 19:55:54 -0600
commit8315f5f3ea43150d250aa16575ab274913f93d2a (patch)
treed9878fa38b8db2467f768ccd4e2d57012505b29d
parent3576202083fb46fb755ceaefb5efe228afa9e2de (diff)
Add PSR control signal set
-rw-r--r--rtl/core/arm810.sv2
-rw-r--r--rtl/core/control/control.sv1
-rw-r--r--rtl/core/control/stall.sv3
-rw-r--r--rtl/core/control/writeback.sv3
-rw-r--r--rtl/core/decode/decode.sv16
-rw-r--r--rtl/core/uarch.sv8
6 files changed, 26 insertions, 7 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv
index ef2d089..2cc35a8 100644
--- a/rtl/core/arm810.sv
+++ b/rtl/core/arm810.sv
@@ -31,6 +31,7 @@ module arm810
);
datapath_decode dec;
+ psr_decode dec_psr;
branch_decode dec_branch;
snd_decode dec_snd;
data_decode dec_data;
@@ -41,6 +42,7 @@ module arm810
core_decode decode
(
.ctrl(dec),
+ .psr_ctrl(dec_psr),
.branch_ctrl(dec_branch),
.snd_ctrl(dec_snd),
.data_ctrl(dec_data),
diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv
index 056606d..917dbf8 100644
--- a/rtl/core/control/control.sv
+++ b/rtl/core/control/control.sv
@@ -4,6 +4,7 @@ module core_control
(
input logic clk,
input datapath_decode dec,
+ input psr_decode dec_psr,
input branch_decode dec_branch,
input data_decode dec_data,
input snd_decode dec_snd,
diff --git a/rtl/core/control/stall.sv b/rtl/core/control/stall.sv
index 5ac1c7a..edf9265 100644
--- a/rtl/core/control/stall.sv
+++ b/rtl/core/control/stall.sv
@@ -5,6 +5,7 @@ module core_control_stall
input logic clk,
input datapath_decode dec,
+ input psr_decode dec_psr,
input data_decode dec_data,
input snd_decode dec_snd,
@@ -32,7 +33,7 @@ module core_control_stall
assign rn_hazard = dec_data.uses_rn && (final_rd == dec_data.rn || dec_data.rn == `R15);
assign snd_hazard = !dec_snd.is_imm && (dec_snd.r == final_rd || dec_snd.r == `R15);
- assign flags_dependency = dec.update_flags || dec.conditional;
+ assign flags_dependency = dec_psr.update_flags || dec.conditional;
assign updating_flags = final_update_flags || update_flags;
always_ff @(posedge clk)
diff --git a/rtl/core/control/writeback.sv b/rtl/core/control/writeback.sv
index 15b17ee..85b2f9f 100644
--- a/rtl/core/control/writeback.sv
+++ b/rtl/core/control/writeback.sv
@@ -5,6 +5,7 @@ module core_control_writeback
input logic clk,
input datapath_decode dec,
+ input psr_decode dec_psr,
input data_decode dec_data,
input ctrl_cycle cycle,
@@ -102,7 +103,7 @@ module core_control_writeback
unique0 case(next_cycle)
ISSUE:
- final_update_flags <= issue && dec.update_flags;
+ final_update_flags <= issue && dec_psr.update_flags;
EXCEPTION:
final_update_flags <= 0;
diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv
index b6c6cbd..bf870b5 100644
--- a/rtl/core/decode/decode.sv
+++ b/rtl/core/decode/decode.sv
@@ -7,6 +7,7 @@ module core_decode
input psr_flags flags,
output datapath_decode ctrl,
+ output psr_decode psr_ctrl,
output branch_decode branch_ctrl,
output snd_decode snd_ctrl,
output data_decode data_ctrl,
@@ -15,19 +16,22 @@ module core_decode
output coproc_decode coproc_ctrl
);
- logic execute, undefined, conditional, writeback,
- update_flags, branch, ldst, mul, coproc;
+ logic execute, undefined, explicit_cond, conditional, writeback,
+ update_flags, branch, ldst, mul, coproc, spsr, psr_write;
assign ctrl.execute = execute;
assign ctrl.undefined = undefined;
assign ctrl.conditional = conditional;
assign ctrl.writeback = writeback;
- assign ctrl.update_flags = update_flags;
assign ctrl.branch = branch;
assign ctrl.coproc = coproc;
assign ctrl.ldst = ldst;
assign ctrl.mul = mul;
+ assign psr_ctrl.saved = spsr;
+ assign psr_ctrl.write = psr_write;
+ assign psr_ctrl.update_flags = update_flags;
+
//TODO
logic restore_spsr;
@@ -38,6 +42,7 @@ module core_decode
.cond(insn `FIELD_COND),
.execute(cond_execute),
.undefined(cond_undefined),
+ .conditional(explicit_cond),
.*
);
@@ -174,10 +179,13 @@ module core_decode
ldst = 0;
branch = 0;
coproc = 0;
-
execute = cond_execute;
undefined = cond_undefined;
writeback = 0;
+ conditional = explicit_cond;
+
+ spsr = 0;
+ psr_write = 0;
update_flags = 0;
data_ctrl = {($bits(data_ctrl)){1'bx}};
diff --git a/rtl/core/uarch.sv b/rtl/core/uarch.sv
index 6ef5a76..a1ca2b1 100644
--- a/rtl/core/uarch.sv
+++ b/rtl/core/uarch.sv
@@ -83,7 +83,6 @@ typedef struct packed
undefined,
conditional,
writeback,
- update_flags,
branch,
coproc,
ldst,
@@ -92,6 +91,13 @@ typedef struct packed
typedef struct packed
{
+ logic update_flags,
+ saved,
+ write;
+} psr_decode;
+
+typedef struct packed
+{
alu_op op;
reg_num rn,
rd;