mk: implement support for quartus synthesis

8 files changed, 388 insertions, 11 deletions

diff --git a/mk/build.mk b/mk/build.mk
index 40b2b9e..33bd81b 100644
--- a/mk/build.mk
+++ b/mk/build.mk
@@ -38,7 +38,7 @@ define setup_obj
 
   $$(obj): export CONTENTS := $$(build_id_text)
   $$(obj):
-	@mkdir -p $$@ && echo -n "$$$$CONTENTS" >$$@/build-vars
+	@mkdir -p $$@ && echo -n "$$$$CONTENTS" >$$@/build-vars && ln -Tsf ../../../ $$@/src
 endef
 
 define find_command_lazy
diff --git a/mk/cores.mk b/mk/cores.mk
index 7ce2e47..238ece4 100644
--- a/mk/cores.mk
+++ b/mk/cores.mk
@@ -17,6 +17,16 @@ core_paths = \
         $(let prefix,$(core_info/$(1)/workdir), \
           $(addprefix /$(if $(prefix),$(prefix)/),$(core_info/$(1)/$(2)))))))
 
+require_core_paths = \
+  $(strip \
+    $(let val,$(strip $(call core_paths,$(1),$(2))), \
+      $(if $(val),$(val),$(error core '$(1)' must define '$(2)'))))
+
+require_core_var = \
+  $(strip \
+    $(let val,$(core_info/$(1)/$(2)), \
+      $(if $(val),$(val),$(error core '$(1)' must define '$(2)'))))
+
 define add_core
   this := core_info/$(1)
 
diff --git a/mk/quartus.mk b/mk/quartus.mk
new file mode 100644
index 0000000..ae26a7d
--- /dev/null
+++ b/mk/quartus.mk
@@ -0,0 +1,128 @@
+# Based on github:alexforencich/verilog-ethernet:example/DE2-115/fpga/common/quartus.mk
+
+targets += syn
+
+quartus_qsf = $(obj)/$(quartus_top).qsf
+quartus_qpf = $(obj)/$(quartus_top).qpf
+quartus_run = cd $(obj) && $(QUARTUS)
+
+quartus_top = $(call per_target,quartus_top)
+quartus_device = $(call per_target,quartus_device)
+quartus_family = "$(call per_target,quartus_family)"
+
+quartus_rtl = $(call per_target,quartus_rtl)
+quartus_sdc = $(call per_target,quartus_sdc)
+quartus_tcl = $(call per_target,quartus_tcl)
+quartus_qip = $(call per_target,quartus_qip)
+quartus_qsys = $(call per_target,quartus_qsys)
+quartus_rtl_include = $(call per_target,quartus_rtl_include)
+
+quartus_platforms = $(call per_target,quartus_platforms)
+quartus_src_files = $(quartus_rtl) $(quartus_sdc) $(quartus_qip) $(quartus_qsys) $(quartus_tcl)
+
+quartus_plat_qip = $(foreach plat,$(quartus_platforms),$(call quartus_plat_path,$(plat)))
+quartus_plat_path = qsys/$(1)/synthesis/$(basename $(notdir $(core_info/$(1)/qsys_platform))).qip
+
+define target/syn/prepare
+  flow/type := syn
+endef
+
+define target/syn/setup
+  $(call target_var,quartus_top) := $$(call require_core_var,$$(rule_top),rtl_top)
+  $(call target_var,quartus_device) := $$(call require_core_var,$$(rule_top),altera_device)
+  $(call target_var,quartus_family) := $$(call require_core_var,$$(rule_top),altera_family)
+endef
+
+define target/syn/rules
+  deps := $$(dep_tree/$$(rule_top))
+
+  $(call target_var,quartus_rtl) := \
+    $$(foreach dep,$$(deps),$$(call core_paths,$$(dep),rtl_files))
+
+  $(call target_var,quartus_rtl_include) := \
+    $$(foreach dep,$$(deps),$$(call core_paths,$$(dep),rtl_include_dirs))
+
+  $(call target_var,quartus_sdc) := \
+    $$(foreach dep,$$(deps),$$(call core_paths,$$(dep),sdc_files))
+
+  $(call target_var,quartus_qip) := \
+    $$(foreach dep,$$(deps),$$(call core_paths,$$(dep),qip_files))
+
+  $(call target_var,quartus_tcl) := \
+    $$(foreach dep,$$(deps),$$(call core_paths,$$(dep),qsf_files))
+
+  $(call target_var,quartus_platforms) := \
+    $$(foreach dep,$$(deps),$$(if $$(core_info/$$(dep)/qsys_platform),$$(dep)))
+
+  $(call target_var,quartus_qsys) := \
+	$$(foreach dep,$$(quartus_platforms),$$(call core_paths,$$(dep),qsys_platform))
+
+  .PHONY: $$(rule_top_path)/syn
+
+  $$(rule_top_path)/syn: $$(obj)/asm.stamp
+
+  $$(obj)/asm.stamp: $$(obj)/sta.stamp
+	$$(call run,ASM) $$(quartus_run)_asm $$(quartus_top)
+	@touch $$@
+
+  $$(obj)/sta.stamp: $$(obj)/fit.stamp
+	$$(call run,STA) $$(quartus_run)_sta $$(quartus_top)
+	@touch $$@
+
+  $$(obj)/fit.stamp: $$(obj)/map.stamp
+	$$(call run,FIT) $$(quartus_run)_fit --part=$$(quartus_device) $$(quartus_top)
+	@touch $$@
+
+  $$(obj)/map.stamp: $$(quartus_qpf)
+	$$(call run,MAP) $$(quartus_run)_map --family=$(quartus_family) $$(quartus_top)
+	@touch $$@
+
+  $$(quartus_qsf) $$(quartus_qpf) &: \
+    $$(top_stamp) $$(quartus_src_files) \
+    $$(addprefix $$(obj)/,$$(quartus_plat_qip))
+	$$(call run,QSF) \
+	rm -f $$(quartus_qsf) $$(quartus_qpf) && \
+	cd $$(obj) && \
+	$$(QUARTUS)_sh \
+		--prepare -f $$(quartus_family) -d $$(quartus_device) \
+		-t $$(quartus_top) $$(quartus_top) && \
+	exec >>$$(quartus_top).qsf && \
+	echo -e "\n\n# Source files" && \
+	assignment() { echo set_global_assignment -name $$$$1 $$$$2; } && \
+	assignment_list() { \
+		title="$$$$1"; \
+		name="$$$$2"; \
+		shift 2; \
+		echo -e "\n# $$$$title" && \
+		for x in $$$$@; do assignment "$$$${name}" "$$$$x"; done \
+	} && \
+	for x in $$(quartus_rtl); do \
+		case $$$${x##*.} in \
+			[Vv])         name=VERILOG_FILE ;; \
+			[Ss][Vv])     name=SYSTEMVERILOG_FILE ;; \
+			[Vv][Hh][Dd]) name=VHDL_FILE ;; \
+			*)            name=SOURCE_FILE ;; \
+		esac; \
+		assignment "$$$$name" "src/$$$$x"; \
+	done && \
+	assignment_list "Search paths" SEARCH_PATH $$(addprefix src/,$$(quartus_rtl_include)) && \
+	assignment_list "Constraint files" SDC_FILE $$(addprefix src/,$$(quartus_sdc)) && \
+	assignment_list "IPs" QIP_FILE $$(addprefix src/,$$(quartus_qip)) && \
+	assignment_list "Platform IPs" QIP_FILE $$(quartus_plat_qip) && \
+	assignment_list "Platforms" QSYS_FILE $$(addprefix src/,$$(quartus_qsys)) && \
+	for x in $$(quartus_tcl); do printf "\n#\n# TCL file %s\n#\n" "$$$$x"; cat "src/$$$$x"; done
+
+  $(call target_entrypoint,$(patsubst %,$$(obj)/%.stamp,map fit sta asm))
+
+  $$(foreach plat,$$(quartus_platforms),$$(eval $$(call quartus_qsys_rules,$$(plat))))
+endef
+
+define quartus_qsys_rules
+  qip_file := $$(obj)/$$(call quartus_plat_path,$(1))
+  qsys_file := $$(call core_paths,$(1),qsys_platform)
+
+  $$(qip_file): qsys_file := $$(qsys_file)
+  $$(qip_file): $$(call core_stamp,$(1)) $$(qsys_file)
+	$$(call run,QSYS,$$(qsys_file)) $$(QSYS_GENERATE) \
+		-syn --part=$$(quartus_device) --output-directory=$$(obj)/qsys/$(1) $$(qsys_file)
+endef
diff --git a/mk/tools.mk b/mk/tools.mk
index 9f3734e..9df3eff 100644
--- a/mk/tools.mk
+++ b/mk/tools.mk
@@ -2,6 +2,8 @@ define find_tools_lazy
   $(call find_command_lazy,cocotb-config,COCOTB_CONFIG)
   $(call find_command_lazy,genhtml,GENHTML)
   $(call find_command_lazy,pkg-config,PKG_CONFIG)
+  $(call find_command_lazy,qsys-generate,QSYS_GENERATE)
+  $(call find_command_lazy,quartus,QUARTUS)
   $(call find_command_lazy,verilator,VERILATOR)
 
   $(call shell_defer,cocotb_share,$$(COCOTB_CONFIG) --share)
diff --git a/mk/top.mk b/mk/top.mk
index 6db6abb..aede1e5 100644
--- a/mk/top.mk
+++ b/mk/top.mk
@@ -31,6 +31,7 @@ include mk/cocotb.mk
 include mk/cores.mk
 include mk/cov.mk
 include mk/output.mk
+include mk/quartus.mk
 include mk/target.mk
 include mk/tools.mk
 include mk/verilator.mk
diff --git a/mk/verilator.mk b/mk/verilator.mk
index 56d8783..2692863 100644
--- a/mk/verilator.mk
+++ b/mk/verilator.mk
@@ -17,10 +17,7 @@ endef
 define target/sim/setup
   $(setup_verilator_target)
 
-  $$(call target_var,vl_main) := $$(strip $$(call core_paths,$$(rule_top),vl_main))
-  ifeq (,$$(vl_main))
-    $$(error core '$$(rule_top)' does not define vl_main)
-  endif
+  $$(call target_var,vl_main) := $$(strip $$(call require_core_paths,$$(rule_top),vl_main))
 endef
 
 define target/sim/rules
@@ -123,8 +120,8 @@ endef
 
 verilator_src_args = \
   $(strip \
-    $(let rtl_top,$(core_info/$(rule_top)/rtl_top), \
-      $(if $(rtl_top),--top $(rtl_top),$(error core '$(rule_top)' must define rtl_top)) \
+    $(let rtl_top,$(call require_core_var,$(rule_top),rtl_top), \
+      --top $(rtl_top) \
       $(foreach dep,$(dep_tree/$(rule_top)), \
         $(let prefix,$(core_info/$(dep)/workdir)/, \
           $(foreach rtl_dir,$(call core_paths,$(dep),rtl_dirs), \
@@ -132,6 +129,5 @@ verilator_src_args = \
           $(foreach include_dir,$(call core_paths,$(dep),rtl_include_dirs), \
             -I$(include_dir)) \
           $(foreach src_file,$(call core_paths,$(dep),rtl_files) $(call core_paths,$(dep),vl_files), \
-            $(src_file)))) \
-      $(if $(core_info/$(rule_top)/rtl_files),,$(rtl_top))) \
+            $(src_file))))) \
     $(if $(vl_main),$(vl_main),$(error $$(vl_main) not defined by target '$(rule_target)')))
diff --git a/pins.tcl b/pins.tcl
new file mode 100644
index 0000000..09f883a
--- /dev/null
+++ b/pins.tcl
@@ -0,0 +1,226 @@
+set_instance_assignment -name D5_DELAY 2 -to memory_mem_ck -tag __hps_sdram_p0
+set_instance_assignment -name D5_DELAY 2 -to memory_mem_ck_n -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dq[0] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dq[1] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dq[2] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dq[3] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dq[4] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dq[5] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dq[6] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dq[7] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dm -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dqs -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_dqs_n -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[0] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[10] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[11] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[12] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[1] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[2] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[3] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[4] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[5] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[6] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[7] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[8] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_a[9] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_ba[0] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_ba[1] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_ba[2] -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_cas_n -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_cke -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_cs_n -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_odt -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_ras_n -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_we_n -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_reset_n -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_ck -tag __hps_sdram_p0
+set_instance_assignment -name PACKAGE_SKEW_COMPENSATION OFF -to memory_mem_ck_n -tag __hps_sdram_p0
+set_instance_assignment -name GLOBAL_SIGNAL OFF -to plat|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|ureset|phy_reset_mem_stable_n -tag __hps_sdram_p0
+set_instance_assignment -name GLOBAL_SIGNAL OFF -to plat|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|ureset|phy_reset_n -tag __hps_sdram_p0
+set_instance_assignment -name GLOBAL_SIGNAL OFF -to plat|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uio_pads|dq_ddio[0].read_capture_clk_buffer -tag __hps_sdram_p0
+set_instance_assignment -name GLOBAL_SIGNAL OFF -to plat|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_write_side[0] -tag __hps_sdram_p0
+set_instance_assignment -name GLOBAL_SIGNAL OFF -to plat|hps_0|hps_io|border|hps_sdram_inst|p0|umemphy|uread_datapath|reset_n_fifo_wraddress[0] -tag __hps_sdram_p0
+set_instance_assignment -name ENABLE_BENEFICIAL_SKEW_OPTIMIZATION_FOR_NON_GLOBAL_CLOCKS ON -to plat|hps_0|hps_io|border|hps_sdram_inst -tag __hps_sdram_p0
+set_instance_assignment -name PLL_COMPENSATION_MODE DIRECT -to plat|hps_0|hps_io|border|hps_sdram_inst|pll0|fbout -tag __hps_sdram_p0
+set_global_assignment -name USE_DLL_FREQUENCY_FOR_DQS_DELAY_CHAIN ON
+set_global_assignment -name UNIPHY_SEQUENCER_DQS_CONFIG_ENABLE ON
+set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
+set_global_assignment -name ECO_REGENERATE_REPORT ON
+
+
+set_location_assignment PIN_AF14 -to clk_clk
+set_location_assignment PIN_AB12 -to rst_n
+
+set_location_assignment PIN_V16 -to pio_leds[0]
+set_location_assignment PIN_W16 -to pio_leds[1]
+set_location_assignment PIN_V17 -to pio_leds[2]
+set_location_assignment PIN_V18 -to pio_leds[3]
+set_location_assignment PIN_W17 -to pio_leds[4]
+set_location_assignment PIN_W19 -to pio_leds[5]
+set_location_assignment PIN_Y19 -to pio_leds[6]
+set_location_assignment PIN_W20 -to pio_leds[7]
+
+set_location_assignment PIN_AA14 -to pio_buttons
+
+set_location_assignment PIN_AD11 -to pio_switches[0]
+set_location_assignment PIN_AD12 -to pio_switches[1]
+set_location_assignment PIN_AE11 -to pio_switches[2]
+set_location_assignment PIN_AC9 -to pio_switches[3]
+set_location_assignment PIN_AD10 -to pio_switches[4]
+set_location_assignment PIN_AE12 -to pio_switches[5]
+
+set_location_assignment PIN_A11 -to vga_dac_clk
+set_location_assignment PIN_B11 -to vga_dac_hsync
+set_location_assignment PIN_D11 -to vga_dac_vsync
+set_location_assignment PIN_F10 -to vga_dac_blank_n
+set_location_assignment PIN_C10 -to vga_dac_sync_n
+set_location_assignment PIN_A13 -to vga_dac_r[0]
+set_location_assignment PIN_C13 -to vga_dac_r[1]
+set_location_assignment PIN_E13 -to vga_dac_r[2]
+set_location_assignment PIN_B12 -to vga_dac_r[3]
+set_location_assignment PIN_C12 -to vga_dac_r[4]
+set_location_assignment PIN_D12 -to vga_dac_r[5]
+set_location_assignment PIN_E12 -to vga_dac_r[6]
+set_location_assignment PIN_F13 -to vga_dac_r[7]
+set_location_assignment PIN_J9 -to vga_dac_g[0]
+set_location_assignment PIN_J10 -to vga_dac_g[1]
+set_location_assignment PIN_H12 -to vga_dac_g[2]
+set_location_assignment PIN_G10 -to vga_dac_g[3]
+set_location_assignment PIN_G11 -to vga_dac_g[4]
+set_location_assignment PIN_G12 -to vga_dac_g[5]
+set_location_assignment PIN_F11 -to vga_dac_g[6]
+set_location_assignment PIN_E11 -to vga_dac_g[7]
+set_location_assignment PIN_B13 -to vga_dac_b[0]
+set_location_assignment PIN_G13 -to vga_dac_b[1]
+set_location_assignment PIN_H13 -to vga_dac_b[2]
+set_location_assignment PIN_F14 -to vga_dac_b[3]
+set_location_assignment PIN_H14 -to vga_dac_b[4]
+set_location_assignment PIN_F15 -to vga_dac_b[5]
+set_location_assignment PIN_G15 -to vga_dac_b[6]
+set_location_assignment PIN_J14 -to vga_dac_b[7]
+
+set_location_assignment PIN_AK14 -to vram_wire_addr[0]
+set_location_assignment PIN_AH14 -to vram_wire_addr[1]
+set_location_assignment PIN_AG15 -to vram_wire_addr[2]
+set_location_assignment PIN_AE14 -to vram_wire_addr[3]
+set_location_assignment PIN_AB15 -to vram_wire_addr[4]
+set_location_assignment PIN_AC14 -to vram_wire_addr[5]
+set_location_assignment PIN_AD14 -to vram_wire_addr[6]
+set_location_assignment PIN_AF15 -to vram_wire_addr[7]
+set_location_assignment PIN_AH15 -to vram_wire_addr[8]
+set_location_assignment PIN_AG13 -to vram_wire_addr[9]
+set_location_assignment PIN_AG12 -to vram_wire_addr[10]
+set_location_assignment PIN_AH13 -to vram_wire_addr[11]
+set_location_assignment PIN_AJ14 -to vram_wire_addr[12]
+set_location_assignment PIN_AF13 -to vram_wire_ba[0]
+set_location_assignment PIN_AJ12 -to vram_wire_ba[1]
+set_location_assignment PIN_AF11 -to vram_wire_cas_n
+set_location_assignment PIN_AK13 -to vram_wire_cke
+set_location_assignment PIN_AH12 -to vram_wire_clk
+set_location_assignment PIN_AG11 -to vram_wire_cs_n
+set_location_assignment PIN_AK6 -to vram_wire_dq[0]
+set_location_assignment PIN_AJ7 -to vram_wire_dq[1]
+set_location_assignment PIN_AK7 -to vram_wire_dq[2]
+set_location_assignment PIN_AK8 -to vram_wire_dq[3]
+set_location_assignment PIN_AK9 -to vram_wire_dq[4]
+set_location_assignment PIN_AG10 -to vram_wire_dq[5]
+set_location_assignment PIN_AK11 -to vram_wire_dq[6]
+set_location_assignment PIN_AJ11 -to vram_wire_dq[7]
+set_location_assignment PIN_AH10 -to vram_wire_dq[8]
+set_location_assignment PIN_AJ10 -to vram_wire_dq[9]
+set_location_assignment PIN_AJ9 -to vram_wire_dq[10]
+set_location_assignment PIN_AH9 -to vram_wire_dq[11]
+set_location_assignment PIN_AH8 -to vram_wire_dq[12]
+set_location_assignment PIN_AH7 -to vram_wire_dq[13]
+set_location_assignment PIN_AJ6 -to vram_wire_dq[14]
+set_location_assignment PIN_AJ5 -to vram_wire_dq[15]
+set_location_assignment PIN_AB13 -to vram_wire_dqm[0]
+set_location_assignment PIN_AK12 -to vram_wire_dqm[1]
+set_location_assignment PIN_AE13 -to vram_wire_ras_n
+set_location_assignment PIN_AA13 -to vram_wire_we_n
+
+
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_oct_rzqin -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dq[0] -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dq[0] -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dq[0] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dq[1] -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dq[1] -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dq[1] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dq[2] -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dq[2] -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dq[2] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dq[3] -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dq[3] -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dq[3] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dq[4] -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dq[4] -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dq[4] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dq[5] -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dq[5] -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dq[5] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dq[6] -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dq[6] -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dq[6] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dq[7] -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dq[7] -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dq[7] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to memory_mem_dqs -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dqs -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dqs -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to memory_mem_dqs_n -tag __hps_sdram_p0
+set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to memory_mem_dqs_n -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dqs_n -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to memory_mem_ck -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to memory_mem_ck -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "DIFFERENTIAL 1.5-V SSTL CLASS I" -to memory_mem_ck_n -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to memory_mem_ck_n -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[0] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[0] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[10] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[10] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[11] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[11] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[12] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[12] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[1] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[1] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[2] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[2] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[3] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[3] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[4] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[4] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[5] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[5] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[6] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[6] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[7] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[7] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[8] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[8] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_a[9] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_a[9] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_ba[0] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_ba[0] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_ba[1] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_ba[1] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_ba[2] -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_ba[2] -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_cas_n -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_cas_n -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_cke -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_cke -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_cs_n -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_cs_n -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_odt -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_odt -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_ras_n -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_ras_n -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_we_n -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_we_n -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_reset_n -tag __hps_sdram_p0
+set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to memory_mem_reset_n -tag __hps_sdram_p0
+set_instance_assignment -name IO_STANDARD "SSTL-15 CLASS I" -to memory_mem_dm -tag __hps_sdram_p0
+set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITH CALIBRATION" -to memory_mem_dm -tag __hps_sdram_p0
diff --git a/rtl/top/mod.mk b/rtl/top/mod.mk
index 6c6acf2..031a2fa 100644
--- a/rtl/top/mod.mk
+++ b/rtl/top/mod.mk
@@ -1,12 +1,26 @@
 cores := conspiracion test_fb test_fifo test_ring test_smp
 
 define core/conspiracion
-  $(this)/targets   := sim
-  $(this)/deps      := conspiracion/tb
+  $(this)/deps := config
+  $(this)/targets := sim
+
   $(this)/rtl_files := conspiracion.sv
   $(this)/rtl_top   := conspiracion
+
   $(this)/vl_main   := ../../tb/top/conspiracion/conspiracion.cpp
   $(this)/vl_runner := run_conspiracion
+
+  $(this)/altera_device := 5CSEMA5F31C6
+  $(this)/altera_family := Cyclone V
+  $(this)/qsys_platform := ../../platform.qsys
+
+  $(this)/sdc_files := ../../conspiracion.sdc
+  $(this)/qip_files := $(patsubst %,../../ip/%.qip,dsp_mul ip_fp_add ip_fp_mul ip_fp_fix)
+  $(this)/qsf_files := ../../pins.tcl
+
+  ifeq (sim,$(flow/type))
+    $(this)/deps += conspiracion/tb
+  endif
 endef
 
 define core/test_fb