conspiracion/tb/top/conspiracion.cpp, branch master Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl, tb: add core.mk files 2024-02-20T17:11:18+00:00 Alejandro Soto alejandro@34project.org 2024-02-12T22:20:12+00:00 6c175d5dc428f630e3bd4caf707db4b77b0b87e7 






platform: implement support for disabling CPUs
2023-10-28T08:29:46+00:00

Alejandro Soto
alejandro@34project.org

2023-10-28T08:29:46+00:00

98d493f9c80f356cdbc2669150d772e451c3b80e












rtl/perf: implement performance unit
2023-10-05T23:16:55+00:00

Alejandro Soto
alejandro@34project.org

2023-10-05T22:26:26+00:00

d406720cecd7328f595255e65b6fd6b6814cefe4












Makefile, tb: add support for cocotb
2023-10-05T19:07:57+00:00

Alejandro Soto
alejandro@34project.org

2023-10-05T06:36:37+00:00

4acd900c4602db0353d11bf6841ddadfd80c57b8












sim: implement fst traces
2023-10-05T01:25:44+00:00

Alejandro Soto
alejandro@34project.org

2023-10-05T01:13:01+00:00

c08af15960a7c313948b8b511297d75c09f50b85












rtl/cache: increase to 64KiB per core
2023-10-04T22:29:41+00:00

Alejandro Soto
alejandro@34project.org

2023-10-04T22:29:41+00:00

5e1773191f8f2dc055c8b2b04afb74d2d3a4d7cf












demo: implement cache debug
2023-10-04T11:04:04+00:00

Alejandro Soto
alejandro@34project.org

2023-10-04T09:46:29+00:00

f52299cf837951cbc1dc92fd0d084444ac3dc712












rtl/cache: implement debug interface
2023-10-04T10:40:48+00:00

Alejandro Soto
alejandro@34project.org

2023-10-04T09:09:13+00:00

3de2c7e7dd214f80b8b9cca575e42e0b1b08034d












tb: fix halt force
2023-10-04T00:55:47+00:00

Alejandro Soto
alejandro@34project.org

2023-10-04T00:55:47+00:00

b0f56144be04db7f62ac30107e392a7902b6fd39












tb: implement verilated slaves
2023-10-03T05:29:46+00:00

Alejandro Soto
alejandro@34project.org

2023-10-02T22:47:23+00:00

2c6998db4ad3b663fa32384739bc11930be5afa2