conspiracion/tb/platform.sv, branch ce3201 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Bug fixes 2022-11-17T14:16:14+00:00 JulianCamacho jjulian.341@gmail.com 2022-11-17T14:16:14+00:00 61bf2100fbd5e0a5f4bd1f013d70d8027604bbba 






Implemente byte-enable signal in stores
2022-11-16T05:31:30+00:00

Alejandro Soto
alejandro@34project.org

2022-11-16T05:18:09+00:00

d9dfa098323bc9ffdc9e976bd4106efc75b2954a












Replace vga_controller with streaming Altera IP
2022-11-15T22:25:49+00:00

Alejandro Soto
alejandro@34project.org

2022-11-15T22:25:41+00:00

044558e53d50ebd053abc76930723c9d7f606569












Implement VGA simulation
2022-11-15T03:10:40+00:00

Alejandro Soto
alejandro@34project.org

2022-11-15T03:10:40+00:00

6fb3849e73b797d4610a2b782127f927dec0c9c9












Route cpu_rst_n signal through bus master
2022-11-13T11:54:44+00:00

Alejandro Soto
alejandro@34project.org

2022-11-13T03:25:37+00:00

9a1dd87d89d3cb57fe0d811e462b9348234eae79












Hardwire PLL reset to ground
2022-11-13T11:54:44+00:00

Alejandro Soto
alejandro@34project.org

2022-11-11T02:03:33+00:00

fb572d6cfb54ce212d2f43de00cb2702f0f433ce












Implement initial state randomization in sim
2022-11-09T15:54:13+00:00

Alejandro Soto
alejandro@34project.org

2022-11-09T15:54:13+00:00

1c1620e48ff6b807aed0c955792b4e8a17614c20












Implement reset
2022-11-09T15:25:48+00:00

Alejandro Soto
alejandro@34project.org

2022-11-09T15:25:48+00:00

5d798386c3b1c1dc45a2fbc382c9367ccc27c524












Add reset signal to bus master
2022-11-09T14:55:57+00:00

Alejandro Soto
alejandro@34project.org

2022-11-09T14:25:40+00:00

5d8c9e67b1b37679823192201900507c3ba15d5b












Add toplevel wires for VGA DAC
2022-11-03T18:17:17+00:00

Alejandro Soto
alejandro@34project.org

2022-11-03T18:17:17+00:00

685731ce5e6d5c9843abeb3c594fa0579516d389