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<title>conspiracion/tb/mem.impl.hpp, branch master</title>
<subtitle>Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.</subtitle>
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<entry>
<title>tb: implement support for cache line-sized slaves</title>
<updated>2023-09-25T05:39:17+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-09-25T05:39:17+00:00</published>
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</entry>
<entry>
<title>Implement hardware virtual memory</title>
<updated>2022-12-16T22:27:19+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-12-11T01:18:21+00:00</published>
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<entry>
<title>Implement VGA simulation</title>
<updated>2022-11-15T03:10:40+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-11-15T03:10:40+00:00</published>
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