conspiracion/tb/avalon.hpp, branch ce3201

conspiracion/tb/avalon.hpp, branch ce3201 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Improve simulation performance for the most common case 2022-12-17T04:20:26+00:00 Alejandro Soto alejandro@34project.org 2022-12-16T19:19:47+00:00 2c7ad7bd098d885f3df623fe099adf500fbafad7

Implement interrupt emulation 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-14T05:21:32+00:00 8c06c97c81339f68e06ff465aac2d8b1f2da4e27

Implement interrupt controller 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-14T03:43:25+00:00 0c63c46e31642d0102542a745af6b445a9d22b3b

Implement register writes from gdb 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-12T05:00:37+00:00 0284628a47d5b4797c89f6846b9efee3f1243b94

Implement hardware virtual memory 2022-12-16T22:27:19+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T01:18:21+00:00 6fee344b754464b1fd17f7c0429e6597e51dc74d

Implement gdbstub 2022-12-06T19:04:15+00:00 Alejandro Soto alejandro@34project.org 2022-12-06T19:04:15+00:00 064b72ae4eb22336438288a9664a37c0dd07f4bc

Add tick, bail signals to simulated Avalon slaves 2022-11-20T19:42:59+00:00 Alejandro Soto alejandro@34project.org 2022-11-20T19:42:59+00:00 df69f7b7c73be01968ba767ab112b227533bbd70

Gracefully exit when Avalon assertions fail during simulation 2022-11-17T05:32:25+00:00 Alejandro Soto alejandro@34project.org 2022-11-17T02:26:10+00:00 f1353e81d59986dfc11e3f1a43e351f6c8117f9b

Implement VGA simulation 2022-11-15T03:10:40+00:00 Alejandro Soto alejandro@34project.org 2022-11-15T03:10:40+00:00 6fb3849e73b797d4610a2b782127f927dec0c9c9

Implement simulation testbenches 2022-10-16T22:01:47+00:00 Alejandro Soto alejandro@34project.org 2022-10-16T22:01:47+00:00 3aca2967a35d05dac3d9121a882d608b10a588bb