conspiracion/sim/sim.py, branch ce3201 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Implement branch history (simulation only) 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-15T04:26:37+00:00 ae7fd6a060c9bb1ce9db83f8eb23fa19e8fa0e7a 






Fix implementation of MMU access faults
2022-12-16T22:29:10+00:00

Alejandro Soto
alejandro@34project.org

2022-12-15T01:16:54+00:00

d2be560fa668cefcc5eff6b88180f12fec0c326e












Implement fast video
2022-12-16T22:29:10+00:00

Alejandro Soto
alejandro@34project.org

2022-12-12T20:34:05+00:00

02712d69cdd859d702cc7577e72db27d6f0c9ad5












Implement gdbstub monitor
2022-12-16T22:29:10+00:00

Alejandro Soto
alejandro@34project.org

2022-12-12T18:48:38+00:00

bb38130bb8e2b8ec17cb6347173af435c5ceef18












Show main cp15 registers in register dumps
2022-12-16T22:29:10+00:00

Alejandro Soto
alejandro@34project.org

2022-12-12T17:47:02+00:00

c67d424c6d130f810c251576fd55389d1385edb5












Implement register writes from gdb
2022-12-16T22:29:10+00:00

Alejandro Soto
alejandro@34project.org

2022-12-12T05:00:37+00:00

0284628a47d5b4797c89f6846b9efee3f1243b94












Implement hardware virtual memory
2022-12-16T22:27:19+00:00

Alejandro Soto
alejandro@34project.org

2022-12-11T01:18:21+00:00

6fee344b754464b1fd17f7c0429e6597e51dc74d












Support gdb interrupts
2022-12-09T01:20:58+00:00

Alejandro Soto
alejandro@34project.org

2022-12-09T01:20:58+00:00

357acc5d82a2b04cf846d69826ec89671e78e759












Make --no-tty optional in sim
2022-12-08T02:06:56+00:00

Alejandro Soto
alejandro@34project.org

2022-12-08T02:06:56+00:00

d8d687ad8052809f66c0b5a36d4ca74d0a3b202c












Make the cycle limit optional
2022-12-08T02:04:23+00:00

Alejandro Soto
alejandro@34project.org

2022-12-08T02:04:15+00:00

a7adc0af074826a4c68c7395d2abfd4b931955df