conspiracion/rtl/core/uarch.sv, branch ce3201 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Implement swi (system call) 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-15T06:41:05+00:00 7bf965b755b667f7da05e0995c2f09c54a8a2f11 






Implement cp15 control
2022-12-09T06:36:44+00:00

Alejandro Soto
alejandro@34project.org

2022-12-09T06:32:34+00:00

b2b2d5124db13714ed82181c9558568d908dfa2a












Implement single-stepping
2022-12-08T01:51:41+00:00

Alejandro Soto
alejandro@34project.org

2022-12-08T01:18:04+00:00

c39552375661e495b344e8386649ade92a4d45b2












Implement breakpoints
2022-12-06T21:27:42+00:00

Alejandro Soto
alejandro@34project.org

2022-12-06T21:27:42+00:00

b1761b8eac5777c09723bbc8cd31cc05d8ec35ae












Implement privilege escalation
2022-11-17T05:32:24+00:00

Alejandro Soto
alejandro@34project.org

2022-11-17T00:37:59+00:00

739a690947165c4c319d2dbd76d4368bf4b59b5a












Implement psr read/write logic
2022-11-16T23:55:27+00:00

Alejandro Soto
alejandro@34project.org

2022-11-16T22:46:52+00:00

683352ce030923bdef3cf4fe90d6cb73f4f74529












Finish decode of psr operations
2022-11-16T19:51:58+00:00

Alejandro Soto
alejandro@34project.org

2022-11-16T19:51:52+00:00

a94c52d5117645016ee319abc30c92f137a4b17e












Convert core state machines to Quartus-inferring RTL
2022-11-13T11:54:44+00:00

Alejandro Soto
alejandro@34project.org

2022-11-13T11:22:23+00:00

d463acba5f9589085afb3dcc4058d82908ff90f2












Rename datapath_decode as ctrl_decode
2022-11-08T06:23:17+00:00

Alejandro Soto
alejandro@34project.org

2022-11-08T06:23:17+00:00

89a8edd4bb96787c69118dd5f549345015b2d480












Refactor decode signals into unified insn_decode struct
2022-11-08T06:19:49+00:00

Alejandro Soto
alejandro@34project.org

2022-11-08T06:19:49+00:00

ac0d6f4e068ff0ff08f05e04053ebd53ba20bcb8