conspiracion/rtl/core/psr.sv, branch ce4302/p2

conspiracion/rtl/core/psr.sv, branch ce4302/p2 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Fix privilege escalation while in user mode 2022-12-17T05:36:05+00:00 Alejandro Soto alejandro@34project.org 2022-12-17T05:36:05+00:00 ca8b6e6696e279f56faacad39501019c3762a1b7

Implement mode privilege checks in MMU 2022-12-17T04:20:26+00:00 Alejandro Soto alejandro@34project.org 2022-12-17T04:20:01+00:00 9ebb4b712e1d6c97a999652d0b9105847eabd134

Implement psr read/write logic 2022-11-16T23:55:27+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T22:46:52+00:00 683352ce030923bdef3cf4fe90d6cb73f4f74529

Simplify flags datapath 2022-11-16T20:08:16+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T20:08:16+00:00 8c410eab0ea97b737ecd59cd4a1f7582f8c045cf

Finish decode of psr operations 2022-11-16T19:51:58+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T19:51:52+00:00 a94c52d5117645016ee319abc30c92f137a4b17e

Implement reset 2022-11-09T15:25:48+00:00 Alejandro Soto alejandro@34project.org 2022-11-09T15:25:48+00:00 5d798386c3b1c1dc45a2fbc382c9367ccc27c524

Quartus has not support for unique0 2022-11-07T20:28:50+00:00 Alejandro Soto alejandro@34project.org 2022-11-07T19:52:12+00:00 280cb5bb42f56d13ae2043b955a7bf286022b0b7

Export PSRs to simulation 2022-11-07T00:37:22+00:00 Alejandro Soto alejandro@34project.org 2022-11-07T00:37:22+00:00 177c8a0f0cff07010d01ead3f072777d94ebd97d

Implement PSR modes and interrupt masks 2022-11-07T00:21:26+00:00 Alejandro Soto alejandro@34project.org 2022-11-07T00:21:26+00:00 e952458d3b1fe3ea109f4122ad1658beda10285e

Pipeline flags writeback (breaks combinational data dependencies) 2022-10-09T20:34:48+00:00 Alejandro Soto alejandro@34project.org 2022-10-09T20:34:48+00:00 1f1f61bbab1396278a861e46fd65a50d1914585e