conspiracion/rtl/core/mmu/mmu.sv, branch ce4302/p2

conspiracion/rtl/core/mmu/mmu.sv, branch ce4302/p2 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl: implement exclusive monitor datapath 2023-10-02T07:46:44+00:00 Alejandro Soto alejandro@34project.org 2023-10-02T07:46:44+00:00 70d7dc9489f4d5b91d8138e0a341eec4ad7f15b0

Implement mode-translated memory accesses 2022-12-18T19:19:55+00:00 Alejandro Soto alejandro@34project.org 2022-12-18T19:19:55+00:00 46eae9622ab6f1a39c6253dc0998e03c57513510

Implement mode privilege checks in MMU 2022-12-17T04:20:26+00:00 Alejandro Soto alejandro@34project.org 2022-12-17T04:20:01+00:00 9ebb4b712e1d6c97a999652d0b9105847eabd134

Implement prefetch aborts 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-12T05:54:38+00:00 79e05aa7f0ccce6eb26248ddef3e928727857a9c

Implement MMU access checks 2022-12-16T22:29:09+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T23:28:03+00:00 d006be2e89aa493237f212811ee880ed8b54241b

Implement data aborts 2022-12-16T22:27:20+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T20:48:08+00:00 ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31

Implement hardware virtual memory 2022-12-16T22:27:19+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T01:18:21+00:00 6fee344b754464b1fd17f7c0429e6597e51dc74d

Implemente byte-enable signal in stores 2022-11-16T05:31:30+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T05:18:09+00:00 d9dfa098323bc9ffdc9e976bd4106efc75b2954a

Rename existing MMU components to MMU arbiter 2022-11-15T22:28:30+00:00 Alejandro Soto alejandro@34project.org 2022-11-15T22:28:30+00:00 1d08cc6aff97a24bffa5ba5b578c52bb545fc393

Convert core state machines to Quartus-inferring RTL 2022-11-13T11:54:44+00:00 Alejandro Soto alejandro@34project.org 2022-11-13T11:22:23+00:00 d463acba5f9589085afb3dcc4058d82908ff90f2