conspiracion/rtl/core/fetch, branch ce4302/p2

conspiracion/rtl/core/fetch, branch ce4302/p2 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Implement prefetch aborts 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-12T05:54:38+00:00 79e05aa7f0ccce6eb26248ddef3e928727857a9c

Implement register writes from gdb 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-12T05:00:37+00:00 0284628a47d5b4797c89f6846b9efee3f1243b94

Implement single-stepping 2022-12-08T01:51:41+00:00 Alejandro Soto alejandro@34project.org 2022-12-08T01:18:04+00:00 c39552375661e495b344e8386649ade92a4d45b2

Mpve combinational logic out of arm810.sv 2022-11-15T22:31:56+00:00 Alejandro Soto alejandro@34project.org 2022-11-15T22:31:56+00:00 54fa97814d58f282e2897f8d8a253bcebd52c8ba

Fix fetch discard glitches on flush 2022-11-11T00:00:43+00:00 Alejandro Soto alejandro@34project.org 2022-11-11T00:00:43+00:00 028ab74e28a08982d0ef5fea9cdf0225c7daeac3

Fix flush-stall relationship in porch 2022-11-10T07:36:37+00:00 Alejandro Soto alejandro@34project.org 2022-11-10T07:36:37+00:00 0f89db514bd174def590645c30a7bd358ea6be93

Implement reset 2022-11-09T15:25:48+00:00 Alejandro Soto alejandro@34project.org 2022-11-09T15:25:48+00:00 5d798386c3b1c1dc45a2fbc382c9367ccc27c524

Register decode output in a new porch stage 2022-11-08T19:29:23+00:00 Alejandro Soto alejandro@34project.org 2022-11-08T19:00:40+00:00 f6929f9a4703e3eee9d7bd9752de055729cdd498

Fix long combinational path between regs and fetch 2022-11-08T01:04:39+00:00 Alejandro Soto alejandro@34project.org 2022-11-08T01:04:39+00:00 c67a1007045a9bf0282c26da74149723c6a2941d

Fix data hazards in nzcv and PC increment 2022-10-17T07:03:25+00:00 Alejandro Soto alejandro@34project.org 2022-10-17T07:03:25+00:00 5079281c8e8889efc2eeba664d93644126006743