conspiracion/rtl/core/decode/mul.sv, branch ce4302/p1 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl/core, tb: replace bus_master with a new top-level module 2023-09-26T03:33:49+00:00 Alejandro Soto alejandro@34project.org 2023-09-26T01:12:49+00:00 ed0bd705f94f6aea568ec8405534984a37770f21 






Implement multiplication control
2022-11-07T19:31:15+00:00

Alejandro Soto
alejandro@34project.org

2022-11-07T18:57:48+00:00

aaf02562e4d49fc93df1f619e3fbd6c85c0e7951












Replace decode enable signals with datapath signals
2022-11-02T05:04:24+00:00

Alejandro Soto
alejandro@34project.org

2022-10-31T21:40:51+00:00

b171ab92f6f7787ca483b83d4b34bbb97f167896












Implement multiplication decode
2022-11-02T05:04:24+00:00

Alejandro Soto
alejandro@34project.org

2022-10-31T21:25:38+00:00

b5a065227bd176b85765461ac2a791fb0cff1c72