conspiracion/rtl/core/decode/ldst/misc.sv, branch ce4302/p2

conspiracion/rtl/core/decode/ldst/misc.sv, branch ce4302/p2 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl/core: implement ldrex/strex decode 2023-10-03T05:29:46+00:00 Alejandro Soto alejandro@34project.org 2023-10-02T17:15:34+00:00 fbe3ab39675d338eb6d5388b7deacf98a3a8ae2d

Fix decoding of LDST_MISC group 2022-11-16T06:03:11+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T06:03:11+00:00 86903ec40acd3014861d856660a27f6a131d8ca3

Replace decode enable signals with datapath signals 2022-11-02T05:04:24+00:00 Alejandro Soto alejandro@34project.org 2022-10-31T21:40:51+00:00 b171ab92f6f7787ca483b83d4b34bbb97f167896

Fix unsafe decode signals 2022-10-17T07:14:14+00:00 Alejandro Soto alejandro@34project.org 2022-10-17T07:14:14+00:00 cf3fa9d250dcbc3d0aa0c688a62902f96e195053

Move isa.sv to core/decode 2022-10-16T07:33:43+00:00 Alejandro Soto alejandro@34project.org 2022-10-16T07:33:43+00:00 f0b38daac3a2f987deb79fcca763f3b84b0f2b73

Implement most memory transactions 2022-10-10T01:25:27+00:00 Alejandro Soto alejandro@34project.org 2022-10-10T01:25:27+00:00 7d95ff01bcd8c42efe118fd1bddaabfca0e937eb

Implement LDR/STR decode 2022-10-08T21:34:46+00:00 Alejandro Soto alejandro@34project.org 2022-10-08T21:34:46+00:00 dab6e68a8396475af5acbf53397f93c6b52e2e71