conspiracion/rtl/core/decode/data.sv, branch ce4302/p2

rtl/core, tb: replace bus_master with a new top-level module

2023-09-26T03:33:49+00:00

Fix flags hazard in ADC, SBC, RSC

2022-11-08T03:03:49+00:00

Move signal `uses_rn` to struct data_decode

2022-10-24T05:34:34+00:00

Break false dependency on r0 for MOV/MVN

2022-10-17T07:25:42+00:00

Move isa.sv to core/decode

2022-10-16T07:33:43+00:00

Split decoding of flexible second operand out of data instructions

2022-10-02T19:23:22+00:00

Major shifter-ALU redesign

2022-10-02T15:49:48+00:00

The shifter unit now works in parallel with the ALU and is no longer
part of it. Instructions that use the shifter as input to the ALU will
now take an additional cycle, unless the control unit can detect a
"trivial shift" situation where the shifter's output will be the same as
its input. This change improves Fmax substantially.

Fix shifter addressing modes

2022-09-26T16:28:18+00:00

Implement shifter decoding

2022-09-26T05:21:32+00:00

Refactor CPSR and uarch.sv

2022-09-26T01:55:29+00:00