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<title>conspiracion/rtl/core/decode/branch.sv, branch ce3201</title>
<subtitle>Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.</subtitle>
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<entry>
<title>Move isa.sv to core/decode</title>
<updated>2022-10-16T07:33:43+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-10-16T07:33:43+00:00</published>
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<entry>
<title>Use word/ptr instead of logic[..]</title>
<updated>2022-09-25T21:03:14+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-09-25T21:03:14+00:00</published>
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<entry>
<title>Implement decode of branch instructions</title>
<updated>2022-09-25T03:41:07+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-09-25T03:41:07+00:00</published>
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