conspiracion/rtl/core/cycles, branch master Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Rename cycles as control 2022-10-16T07:38:33+00:00 Alejandro Soto alejandro@34project.org 2022-10-16T07:38:33+00:00 2e6ce7931b690ccec1e41fa6847dfc1351c59d75 






Implement most memory transactions
2022-10-10T01:25:27+00:00

Alejandro Soto
alejandro@34project.org

2022-10-10T01:25:27+00:00

7d95ff01bcd8c42efe118fd1bddaabfca0e937eb