conspiracion/rtl/core/cp15/far.sv, branch ce4302/p2 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Show main cp15 registers in register dumps 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-12T17:47:02+00:00 c67d424c6d130f810c251576fd55389d1385edb5 






Implement MMU access checks
2022-12-16T22:29:09+00:00

Alejandro Soto
alejandro@34project.org

2022-12-11T23:28:03+00:00

d006be2e89aa493237f212811ee880ed8b54241b












Implement data aborts
2022-12-16T22:27:20+00:00

Alejandro Soto
alejandro@34project.org

2022-12-11T20:48:08+00:00

ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31












Implement rest of cp15 registers
2022-12-11T01:36:38+00:00

Alejandro Soto
alejandro@34project.org

2022-12-11T01:36:38+00:00

8026947ecdf9b023c3720b26bf257bf46f7a2805