conspiracion/rtl/core/control/psr.sv, branch master

conspiracion/rtl/core/control/psr.sv, branch master Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl/core, tb: replace bus_master with a new top-level module 2023-09-26T03:33:49+00:00 Alejandro Soto alejandro@34project.org 2023-09-26T01:12:49+00:00 ed0bd705f94f6aea568ec8405534984a37770f21

Implement privileged ldm/stm of user registers 2022-12-19T00:31:03+00:00 Alejandro Soto alejandro@34project.org 2022-12-19T00:31:03+00:00 e290956adf94dade4c9c4cd057cca08af1c61aeb

Fix register corruption when interrupting a load-store 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-15T04:24:58+00:00 ef151fffb14eac19a19121dfb4c1e015e7470038

Implement data aborts 2022-12-16T22:27:20+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T20:48:08+00:00 ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31

Implement privilege escalation 2022-11-17T05:32:24+00:00 Alejandro Soto alejandro@34project.org 2022-11-17T00:37:59+00:00 739a690947165c4c319d2dbd76d4368bf4b59b5a

Implement psr read/write logic 2022-11-16T23:55:27+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T22:46:52+00:00 683352ce030923bdef3cf4fe90d6cb73f4f74529