conspiracion/rtl/core/control/mul.sv, branch master Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl/core, tb: replace bus_master with a new top-level module 2023-09-26T03:33:49+00:00 Alejandro Soto alejandro@34project.org 2023-09-26T01:12:49+00:00 ed0bd705f94f6aea568ec8405534984a37770f21 






Convert core state machines to Quartus-inferring RTL
2022-11-13T11:54:44+00:00

Alejandro Soto
alejandro@34project.org

2022-11-13T11:22:23+00:00

d463acba5f9589085afb3dcc4058d82908ff90f2












Implement reset
2022-11-09T15:25:48+00:00

Alejandro Soto
alejandro@34project.org

2022-11-09T15:25:48+00:00

5d798386c3b1c1dc45a2fbc382c9367ccc27c524












Refactor decode signals into unified insn_decode struct
2022-11-08T06:19:49+00:00

Alejandro Soto
alejandro@34project.org

2022-11-08T06:19:49+00:00

ac0d6f4e068ff0ff08f05e04053ebd53ba20bcb8












Remove false dependencies on control.issue (long combinational)
2022-11-08T01:07:55+00:00

Alejandro Soto
alejandro@34project.org

2022-11-08T01:07:55+00:00

4ccb96c1aaf348f677954171751b58ad8f4dccf1












Quartus has not support for unique0
2022-11-07T20:28:50+00:00

Alejandro Soto
alejandro@34project.org

2022-11-07T19:52:12+00:00

280cb5bb42f56d13ae2043b955a7bf286022b0b7












Implement multiplication control
2022-11-07T19:31:15+00:00

Alejandro Soto
alejandro@34project.org

2022-11-07T18:57:48+00:00

aaf02562e4d49fc93df1f619e3fbd6c85c0e7951












Move multiplication logic out of control.sv
2022-11-06T21:48:50+00:00

Alejandro Soto
alejandro@34project.org

2022-11-06T21:48:50+00:00

887d3872491fd80da9ec1c6963e5c2809fe3522c