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<title>conspiracion/rtl/core/control/ldst, branch ce4302/p1</title>
<subtitle>Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.</subtitle>
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<entry>
<title>rtl/core/control: reject strex after exceptions</title>
<updated>2023-10-03T13:44:27+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-10-03T13:44:27+00:00</published>
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</entry>
<entry>
<title>rtl/core/control: implement exclusive ldst</title>
<updated>2023-10-03T05:29:46+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-10-03T00:13:29+00:00</published>
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</entry>
<entry>
<title>rtl: implement exclusive monitor datapath</title>
<updated>2023-10-02T07:46:44+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-10-02T07:46:44+00:00</published>
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</entry>
<entry>
<title>Implement mode-translated memory accesses</title>
<updated>2022-12-18T19:19:55+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-12-18T19:19:55+00:00</published>
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</entry>
<entry>
<title>Fix register corruption when interrupting a load-store</title>
<updated>2022-12-16T22:29:10+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-12-15T04:24:58+00:00</published>
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</entry>
<entry>
<title>Implement data aborts</title>
<updated>2022-12-16T22:27:20+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-12-11T20:48:08+00:00</published>
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</entry>
<entry>
<title>Implemente byte-enable signal in stores</title>
<updated>2022-11-16T05:31:30+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-11-16T05:18:09+00:00</published>
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<entry>
<title>Implement sub-word memory accesses</title>
<updated>2022-11-16T02:56:48+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-11-16T02:02:17+00:00</published>
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<entry>
<title>Rewrite duplicate ldst logic as signal ldst_next</title>
<updated>2022-11-16T00:32:55+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-11-16T00:32:55+00:00</published>
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<entry>
<title>Convert core state machines to Quartus-inferring RTL</title>
<updated>2022-11-13T11:54:44+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-11-13T11:22:23+00:00</published>
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