conspiracion/rtl/core/control/ldst/ldst.sv, branch ce3201

conspiracion/rtl/core/control/ldst/ldst.sv, branch ce3201 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Implement mode-translated memory accesses 2022-12-18T19:19:55+00:00 Alejandro Soto alejandro@34project.org 2022-12-18T19:19:55+00:00 46eae9622ab6f1a39c6253dc0998e03c57513510

Fix register corruption when interrupting a load-store 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-15T04:24:58+00:00 ef151fffb14eac19a19121dfb4c1e015e7470038

Implement data aborts 2022-12-16T22:27:20+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T20:48:08+00:00 ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31

Implemente byte-enable signal in stores 2022-11-16T05:31:30+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T05:18:09+00:00 d9dfa098323bc9ffdc9e976bd4106efc75b2954a

Implement sub-word memory accesses 2022-11-16T02:56:48+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T02:02:17+00:00 2b457b34b842e0e2fa6236b304860ad3ba474b16

Rewrite duplicate ldst logic as signal ldst_next 2022-11-16T00:32:55+00:00 Alejandro Soto alejandro@34project.org 2022-11-16T00:32:55+00:00 a055bc85bc50897644e7ed62699abff46d818d5f

Convert core state machines to Quartus-inferring RTL 2022-11-13T11:54:44+00:00 Alejandro Soto alejandro@34project.org 2022-11-13T11:22:23+00:00 d463acba5f9589085afb3dcc4058d82908ff90f2

Fix reset glitches 2022-11-10T16:11:33+00:00 Alejandro Soto alejandro@34project.org 2022-11-10T16:11:33+00:00 acca3eb31a051f335c51306786bb972c21634998

Implement reset 2022-11-09T15:25:48+00:00 Alejandro Soto alejandro@34project.org 2022-11-09T15:25:48+00:00 5d798386c3b1c1dc45a2fbc382c9367ccc27c524

Refactor decode signals into unified insn_decode struct 2022-11-08T06:19:49+00:00 Alejandro Soto alejandro@34project.org 2022-11-08T06:19:49+00:00 ac0d6f4e068ff0ff08f05e04053ebd53ba20bcb8