conspiracion/rtl/core/control/exception.sv, branch ce3201

conspiracion/rtl/core/control/exception.sv, branch ce3201 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Fix privilege escalation while in user mode 2022-12-17T05:36:05+00:00 Alejandro Soto alejandro@34project.org 2022-12-17T05:36:05+00:00 ca8b6e6696e279f56faacad39501019c3762a1b7

Add interrupt controller to Platform Designer 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-15T18:30:30+00:00 6e52e1df7567cdf419a193bf541dd98c0253e5a4

Implement swi (system call) 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-15T06:41:05+00:00 7bf965b755b667f7da05e0995c2f09c54a8a2f11

Implement interrupt emulation 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-14T05:21:32+00:00 8c06c97c81339f68e06ff465aac2d8b1f2da4e27

Implement IRQ exceptions 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-14T03:57:04+00:00 f3c153f342ed969b1abfbe79d1017b651f21a649

Implement prefetch aborts 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-12T05:54:38+00:00 79e05aa7f0ccce6eb26248ddef3e928727857a9c

Implement data aborts 2022-12-16T22:27:20+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T20:48:08+00:00 ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31

Expose cp15 signals to core toplevel 2022-12-11T01:56:19+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T01:56:19+00:00 6b163a88179ac3073d22622be4991f332529c8bd

Implement reset 2022-11-09T15:25:48+00:00 Alejandro Soto alejandro@34project.org 2022-11-09T15:25:48+00:00 5d798386c3b1c1dc45a2fbc382c9367ccc27c524

Move exception logic out of control.sv 2022-11-06T21:18:47+00:00 Alejandro Soto alejandro@34project.org 2022-11-06T21:16:13+00:00 beebe7c376b329ec5c084aedd6d726378d742a77