conspiracion/rtl/core/control/cycles.sv, branch ce4302/p2 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl/core/control: reject strex after exceptions 2023-10-03T13:44:27+00:00 Alejandro Soto alejandro@34project.org 2023-10-03T13:44:27+00:00 6ddd97b7289b043c41ac65ae35931bd5b5acfaeb 






Implement data aborts
2022-12-16T22:27:20+00:00

Alejandro Soto
alejandro@34project.org

2022-12-11T20:48:08+00:00

ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31












Implement cp15 control
2022-12-09T06:36:44+00:00

Alejandro Soto
alejandro@34project.org

2022-12-09T06:32:34+00:00

b2b2d5124db13714ed82181c9558568d908dfa2a












Implement privilege escalation
2022-11-17T05:32:24+00:00

Alejandro Soto
alejandro@34project.org

2022-11-17T00:37:59+00:00

739a690947165c4c319d2dbd76d4368bf4b59b5a












Implement psr read/write logic
2022-11-16T23:55:27+00:00

Alejandro Soto
alejandro@34project.org

2022-11-16T22:46:52+00:00

683352ce030923bdef3cf4fe90d6cb73f4f74529












Fix big Quartus state transition bug
2022-11-13T11:56:33+00:00

Alejandro Soto
alejandro@34project.org

2022-11-13T11:53:13+00:00

211d564c1d97db8813a1d5ae5cfaecff86df2120












Convert core state machines to Quartus-inferring RTL
2022-11-13T11:54:44+00:00

Alejandro Soto
alejandro@34project.org

2022-11-13T11:22:23+00:00

d463acba5f9589085afb3dcc4058d82908ff90f2












Implement CPU halt
2022-11-13T11:54:44+00:00

Alejandro Soto
alejandro@34project.org

2022-11-13T03:47:54+00:00

6cb000adf57d7af2ec4aac8fd93d12f09cc63556












Implement reset
2022-11-09T15:25:48+00:00

Alejandro Soto
alejandro@34project.org

2022-11-09T15:25:48+00:00

5d798386c3b1c1dc45a2fbc382c9367ccc27c524












Quartus has not support for unique0
2022-11-07T20:28:50+00:00

Alejandro Soto
alejandro@34project.org

2022-11-07T19:52:12+00:00

280cb5bb42f56d13ae2043b955a7bf286022b0b7