conspiracion/rtl/core/control/control.sv, branch master

conspiracion/rtl/core/control/control.sv, branch master Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl: refactor filenames and directory hierarchy 2024-02-20T17:11:17+00:00 Alejandro Soto alejandro@34project.org 2024-01-21T12:23:46+00:00 f3b18ead59ae02f95dabbf0a1dea40873a816975

rtl/core/control: reject strex after exceptions 2023-10-03T13:44:27+00:00 Alejandro Soto alejandro@34project.org 2023-10-03T13:44:27+00:00 6ddd97b7289b043c41ac65ae35931bd5b5acfaeb

rtl: implement exclusive monitor datapath 2023-10-02T07:46:44+00:00 Alejandro Soto alejandro@34project.org 2023-10-02T07:46:44+00:00 70d7dc9489f4d5b91d8138e0a341eec4ad7f15b0

Implement privileged ldm/stm of user registers 2022-12-19T00:31:03+00:00 Alejandro Soto alejandro@34project.org 2022-12-19T00:31:03+00:00 e290956adf94dade4c9c4cd057cca08af1c61aeb

Implement mode-translated memory accesses 2022-12-18T19:19:55+00:00 Alejandro Soto alejandro@34project.org 2022-12-18T19:19:55+00:00 46eae9622ab6f1a39c6253dc0998e03c57513510

Fix datapath of shifter carry-out during adc/sbc/rsc 2022-12-18T06:22:23+00:00 Alejandro Soto alejandro@34project.org 2022-12-18T06:22:13+00:00 6d458ad9629268ecfc69881b4fb10dca0498fbd0

Fix privilege escalation while in user mode 2022-12-17T05:36:05+00:00 Alejandro Soto alejandro@34project.org 2022-12-17T05:36:05+00:00 ca8b6e6696e279f56faacad39501019c3762a1b7

Implement IRQ exceptions 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-14T03:57:04+00:00 f3c153f342ed969b1abfbe79d1017b651f21a649

Implement prefetch aborts 2022-12-16T22:29:10+00:00 Alejandro Soto alejandro@34project.org 2022-12-12T05:54:38+00:00 79e05aa7f0ccce6eb26248ddef3e928727857a9c

Implement data aborts 2022-12-16T22:27:20+00:00 Alejandro Soto alejandro@34project.org 2022-12-11T20:48:08+00:00 ff71bcd0c5425c168f111b8f4a92d0a90a6c9c31