conspiracion/rtl/core/bus_master.sv, branch masterLinux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.platform: implement support for disabling CPUs2023-10-28T08:29:46+00:00Alejandro Sotoalejandro@34project.org2023-10-28T08:29:46+00:0098d493f9c80f356cdbc2669150d772e451c3b80e