conspiracion/rtl/core/alu, branch ce4302/p2 Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. Fix datapath of shifter carry-out during adc/sbc/rsc 2022-12-18T06:22:23+00:00 Alejandro Soto alejandro@34project.org 2022-12-18T06:22:13+00:00 6d458ad9629268ecfc69881b4fb10dca0498fbd0 






Fix carry flag bug
2022-11-17T05:32:25+00:00

Alejandro Soto
alejandro@34project.org

2022-11-17T05:32:00+00:00

f66b372bdffea29ecac3172dd49e48783db45dc1












Improve ALU performance
2022-11-08T21:59:12+00:00

Alejandro Soto
alejandro@34project.org

2022-11-08T21:59:12+00:00

13b112dcb8f67778c6a140cb5ce8f1ab21aa6fb9












Major shifter-ALU redesign
2022-10-02T15:49:48+00:00

Alejandro Soto
alejandro@34project.org

2022-10-02T15:49:48+00:00

e97d445908f39a3a1a215a824f52b283147e6195

The shifter unit now works in parallel with the ALU and is no longer
part of it. Instructions that use the shifter as input to the ALU will
now take an additional cycle, unless the control unit can detect a
"trivial shift" situation where the shifter's output will be the same as
its input. This change improves Fmax substantially.





The shifter unit now works in parallel with the ALU and is no longer
part of it. Instructions that use the shifter as input to the ALU will
now take an additional cycle, unless the control unit can detect a
"trivial shift" situation where the shifter's output will be the same as
its input. This change improves Fmax substantially.







Fix MVN (not instead of neg)
2022-09-26T16:32:06+00:00

Alejandro Soto
alejandro@34project.org

2022-09-26T16:32:06+00:00

47b3b68aa25fb571a14cba9f5cc788ae500a9e84












Fix shifter addressing modes
2022-09-26T16:28:18+00:00

Alejandro Soto
alejandro@34project.org

2022-09-26T16:28:18+00:00

dec51abad98cfdee3e0262ff667a53f510c33360












Implement ALU shifter
2022-09-26T15:26:35+00:00

Alejandro Soto
alejandro@34project.org

2022-09-26T15:26:35+00:00

af2f49f863deaeb6dc905bbb15701b50bc139873












Define ALU control signal set
2022-09-26T05:35:28+00:00

Alejandro Soto
alejandro@34project.org

2022-09-26T05:35:28+00:00

14d06f0bc047ad79830890807bfe6195ba3de8ff












Refactor CPSR and uarch.sv
2022-09-26T01:55:29+00:00

Alejandro Soto
alejandro@34project.org

2022-09-26T01:55:29+00:00

fa370016708149976c748c14eadad1f89cf5a8ea












Implement ALU
2022-09-25T23:46:38+00:00

Alejandro Soto
alejandro@34project.org

2022-09-25T23:46:38+00:00

b5f43ef8431532b1e0b498a88072fdfd2cf81ac9