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<title>conspiracion/rtl/conspiracion.sv, branch master</title>
<subtitle>Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.</subtitle>
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<entry>
<title>Update project structure to match Verilator Makefile</title>
<updated>2022-09-18T04:10:39+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-09-18T04:10:39+00:00</published>
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</entry>
<entry>
<title>Add SDRAM test</title>
<updated>2022-09-05T00:09:38+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-09-05T00:09:38+00:00</published>
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</entry>
<entry>
<title>Add Avalon bus master</title>
<updated>2022-09-04T22:14:37+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-09-04T22:14:37+00:00</published>
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</entry>
<entry>
<title>Add hps_0 platform design</title>
<updated>2022-09-03T03:41:18+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-09-03T03:41:18+00:00</published>
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<entry>
<title>Initial commit</title>
<updated>2022-09-01T20:39:59+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2022-09-01T20:39:59+00:00</published>
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