conspiracion/rtl/cache/sram.sv, branch master

conspiracion/rtl/cache/sram.sv, branch master Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. rtl: refactor filenames and directory hierarchy 2024-02-20T17:11:17+00:00 Alejandro Soto alejandro@34project.org 2024-01-21T12:23:46+00:00 f3b18ead59ae02f95dabbf0a1dea40873a816975

fix alignment 2023-10-05T00:42:01+00:00 Fabian Montero fabian@posixlycorrect.com 2023-10-05T00:42:01+00:00 706643974ef34d27b233ea24876c56f2d5ffb2f4

improve comments 2023-10-05T00:40:31+00:00 Fabian Montero fabian@posixlycorrect.com 2023-10-05T00:40:31+00:00 d6fd0c6a8bea89da8728aee51f1b0fadc8c0331e

sram comments 2023-10-05T00:38:07+00:00 JulianCamacho jjulian.341@gmail.com 2023-10-05T00:38:07+00:00 110a60bedd5bdd1fd4790e18382970f960146bfc

fix typo 2023-10-05T00:30:14+00:00 Fabian Montero fabian@posixlycorrect.com 2023-10-05T00:30:14+00:00 5e5652ce90953a35fe4aaf8b41fb93ac26658b8f

explica composición de cache en archivo SRAM. 2023-10-05T00:28:59+00:00 Fabian Montero fabian@posixlycorrect.com 2023-10-05T00:28:59+00:00 c0048dbf8f4bc963f37bfbf2bfbafcd111479d85

improve comments 2023-10-05T00:21:17+00:00 Fabian Montero fabian@posixlycorrect.com 2023-10-05T00:21:17+00:00 dc14faa1cf9021432601ab5f1f20b658dea1bbdf

sram comment 2023-10-05T00:19:34+00:00 JulianCamacho jjulian.341@gmail.com 2023-10-05T00:19:34+00:00 4448c8f77c87ad1ac34f42df2ef6ef91c36b54a6

sram, offset and routing comments 2023-10-03T22:55:27+00:00 JulianCamacho jjulian.341@gmail.com 2023-10-03T22:55:27+00:00 bc466f0511d8b3029c0822f415ebc9ae152b9d09

comentarios 2023-10-03T07:39:00+00:00 JulianCamacho jjulian.341@gmail.com 2023-10-03T07:39:00+00:00 8c5a91578ca929f3a94b54628f6431c136dc417d