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<title>conspiracion/rtl/cache/offsets.sv, branch ce4302/p2</title>
<subtitle>Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.</subtitle>
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<entry>
<title>platform: implement support for disabling CPUs</title>
<updated>2023-10-28T08:29:46+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-10-28T08:29:46+00:00</published>
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</entry>
<entry>
<title>añade comments a offset</title>
<updated>2023-10-05T01:12:17+00:00</updated>
<author>
<name>Fabian Montero</name>
<email>fabian@posixlycorrect.com</email>
</author>
<published>2023-10-05T01:12:17+00:00</published>
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<entry>
<title>add comments to offset</title>
<updated>2023-10-05T00:54:13+00:00</updated>
<author>
<name>Fabian Montero</name>
<email>fabian@posixlycorrect.com</email>
</author>
<published>2023-10-05T00:54:13+00:00</published>
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</entry>
<entry>
<title>sram, offset and routing comments</title>
<updated>2023-10-03T22:55:27+00:00</updated>
<author>
<name>JulianCamacho</name>
<email>jjulian.341@gmail.com</email>
</author>
<published>2023-10-03T22:55:27+00:00</published>
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</entry>
<entry>
<title>comentarios</title>
<updated>2023-10-03T07:39:00+00:00</updated>
<author>
<name>JulianCamacho</name>
<email>jjulian.341@gmail.com</email>
</author>
<published>2023-10-03T07:39:00+00:00</published>
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</entry>
<entry>
<title>rtl/cache: implement</title>
<updated>2023-09-25T04:14:57+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-09-25T02:58:04+00:00</published>
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