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<title>conspiracion/rtl/cache/monitor.sv, branch ce4302/p2</title>
<subtitle>Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.</subtitle>
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<entry>
<title>añade comentarios de monitor</title>
<updated>2023-10-05T01:34:44+00:00</updated>
<author>
<name>Fabian Montero</name>
<email>fabian@posixlycorrect.com</email>
</author>
<published>2023-10-05T01:34:44+00:00</published>
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<entry>
<title>añade explicación de monitor</title>
<updated>2023-10-05T01:29:06+00:00</updated>
<author>
<name>Fabian Montero</name>
<email>fabian@posixlycorrect.com</email>
</author>
<published>2023-10-05T01:28:09+00:00</published>
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<entry>
<title>rtl/cache: implement ll/sc line monitor</title>
<updated>2023-10-03T13:45:26+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-10-03T13:45:12+00:00</published>
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