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<title>conspiracion/ip/ip_fp_add_sim/aldec, branch master</title>
<subtitle>Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.</subtitle>
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<entry>
<title>rtl/gfx: synchronize clock with SDRAM</title>
<updated>2023-10-26T07:33:00+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-10-26T07:33:00+00:00</published>
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</entry>
<entry>
<title>ip: downgrade to 16-bit floats</title>
<updated>2023-10-21T21:37:45+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-10-21T21:37:45+00:00</published>
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<entry>
<title>ip: add ip_fp_add, ip_fp_mul</title>
<updated>2023-10-21T05:10:55+00:00</updated>
<author>
<name>Alejandro Soto</name>
<email>alejandro@34project.org</email>
</author>
<published>2023-10-21T04:59:27+00:00</published>
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